The invention relates to an SOI (silicon on insulator) sense amplifier design and, more particularly, to improving clocking, sense history and loading characteristics.
Typically, high density, high performance SRAM (Static Random Access Memory) signal state detection circuit designs rely on small signal sense amplifiers to detect the state of a stored value. Several approaches are available to the SRAM designer. When SRAM circuit design transitioned from bulk technologies to SOI technologies, sense amplifiers FETs (Field Effect Transistor) required the addition of body contacts to maintain matching between the sensing devices inside the sense amplifier.
One prior art traditional cross-coupled inverter sense amplifier approach used requires synchronization of the bitline precharge and the sense amplifier timing.
A prior art SOI sense amplifier circuit design approach had the advantage of only having gate loads on the small signal inputs. The approach also allowed for different timings between pre-charging of the small signal inputs and the output of the sense amplifier itself. Such an amplifier used cross-connected inverters operating in a latch node that is triggered during a different portion of the cycle than the pre-charging. As known to those skilled in the art, SOI FETs typically have the body floating (ungrounded), as opposed to bulk technology FETs. The floating body of the FET can cause a history problem in that such FETs receiving a plurality of logic ones become biased in a given direction and require a much longer time than typical to react to a logic zero input. Thus, timing becomes critical in high performance circuits.
One might expect to minimize this history problem by connecting the bodies of critical FETs to ground (body contact FETs). However, when the body of an SOI FET is grounded, the reaction time to a signal input is reduced. Further, in such a circuit, the history related voltage buildup on the latch portion of the sense amplifier affects the timing of the output (reaction time is voltage dependent). Additionally, a grounded body contact FET has a lower input signal sensitivity than does an ungrounded SOI FET.
It would thus be desirable to have a sense amplifier that does not need synchronized clocks, can be relatively insensitive to the variable delay related to history problems and has a higher sensitivity to input signals than prior art circuits.
The present invention comprises using grounded body FETs in combination with high threshold input voltage FETs to provide an improved sense amplifier.